In recent years, the demand for mobile or portable electronic devices of all sorts has grown tremendously. Because of advances in microelectronic circuitry sizes and battery technology, portable applications have grown from conventional low performance products such as wrist watches and calculators to high performance products such as notebook computers, personal digital assistants, camcorders and cellular telephones. The versatile functionality of high performance portable devices typically requires high computation speeds, however with low power consumption.
Reducing power consumption in portable devices translates directly into longer operational time while decreasing the size and weight of the batteries. In addition, reducing power consumption also means reduced heat in the integrated circuitry. For both portable and non-portable devices, reduced heat allows for more transistors to be integrated into a single chip or on a multichip module. This allows increased functionability in a smaller package, which is particularly important in voice/video communications and multimedia applications. Moreover, reduced circuit heat allows for the use of less expensive packaging technology without suffering reliability. As can be appreciated, cost reduction is another important consideration in portable devices.
System designers of portable devices are increasingly using digital signal processors ("DSP"s) because of the DSP's ability to quickly process large amounts of "real world" numerical data. A DSP processes "real world" signals such as voice, image and video signals by converting these analog signals into their digital equivalents at discrete time intervals for processing in the digital domain. The result is an array of numerical values stored in memory, which can be repetitively processed at high speeds.
To reduce the power consumption of the DSP, many system designs have produced low-voltage versions and/or have added power management features to provide greater control over a processor's power consumption. Power management features available on some DSPs include:
Reduced voltage operation. Several DSPs are designed to operate on 3.3 volts. Some DSPs can operate at 3.0 volts as well.
"Sleep" or "idle" modes. Many DSPs provide power-down modes that turn off the clock to certain sections of the processor, reducing power consumption.
Programmable clock dividers. Some newer DSPs allow the processor's clock frequency to be varied under software control. System designers can use the minimum clock speed required for a particular task.
Peripheral control. Some DSPs allow the programmer to disable peripherals that are not in use.
Going a step further, system designers have attempted to reduce the number of process steps taken to complete certain functions within the DSP in order to save power. A lot of attention has been focused on the multiplier function of the DSP, because of the proportionately large amount of power consumed by the multiplier. For example, Booth encoding techniques are widely used to reduce the number of partial product addition steps in parallel and array multipliers. Adding delay circuits and flip-flops to reduce spurious transactions in the multiplier array have also been practiced.
However, the above stated methods assume that the switching activities at the multiplier inputs are given, and seek to minimize the internal switching activities based on this assumption. Accordingly, what is needed is method to reduce the power consumed by a DSP multiplier circuit that takes advantage of the power savings achieved through control of the operands provided to the multiplier inputs.
It is, therefore, an object of present invention to provide a multiplier circuit and method for reducing the power consumption of a DSP.
It is another object of the present invention to provide a multiplier circuit and method for reducing the heat dissipation of a DSP to increase its reliability and reduce integrated circuit packaging costs.
It is still another object of the present invention to accomplish to above-stated objects by utilizing a multiplier circuit and method which is simple in design and use, and economical to perform.
The foregoing objects and advantages of the invention are illustrative of those which can be achieved by the present invention and are not intended to be exhaustive or limiting of the possible advantages which can be realized. Thus, these and other objects and advantages of the invention will be apparent from the description herein or can be learned from practicing the invention, both as embodied herein or as modified in view of any variation which may be apparent to those skilled in the art. Accordingly, the present invention resides in the novel methods, arrangements, combinations and improvements herein shown and described.